An EU Horizon 2020 Project

Architecting More Than Moore

Wireless Plasticity for Massive Heterogeneous Computer Architectures

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Code Repositories

  • Gem5-X: GitHub
  • Gem5-X with AIMC cores support: GitHub
  • Gem5-X with on-chip wireless support: GitHub
  • Simulator and full software stack for heterogeneous PULP platform: GitHub
  • DNN mapping flow for PULP architectures: GitHub

Public Deliverables

  • D1.1 SiGe BiCMOS test devices PDF
  • D1.2 Graphene integration design report PDF
  • D1.3 Tunable and Switchable Graphene Multiantenna Report PDF
  • D2.1 First co-integration of graphene antennas with full custom SiGe transceivers PDF
  • D2.2 High performance graphene on wafer scale including encapsulation PDF
  • D2.3 Full transceiver/antenna subsystem with high performance ready for measurements PDF
  • D3.1 Channel model PDF
  • D3.2 Wireless communication performance and cost models PDF
  • D3.3 Adaptive protocol stack PDF
  • D4.1 AI applications workloads (UNIBO, M6) PDF
  • D4.2 In-Memory accelerator PDF
  • D4.3 Heterogeneous System-on-Chip PDF
  • D5.1 Die-level system simulator considering wired and wireless interconnect (EPFL, M12) PDF
  • D5.1 Appendix: gXR5 technical documentation (EPFL, M12) PDF
  • D5.2 Die-level exploration at design-time/runtime PDF
  • D5.3 Package-level exploration PDF
  • D5.4 Release of the open-source simulator with benchmark architectures PDF
  • D6.1 Setup of public project website communication channels (IBM, M1) PDF

EU logo This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 863337.

Project Coordination: Sergi Abadal (UPC)
www.upc.edu